The search for higher NAND densities has led to widespread use of multilevel cells containing multiple data bits. Density goes up, but reliability and endurance decrease and latency increases.QLC 3D NAND is the latest such approach, now with 4-bit cells. Controllers must cope with about 5x lower endurance than TLC and much longer programming times. Read disturb and retention become more pronounced, particularly with increasing wear, and require more complex error mitigation and more internal data relocations.Tradeoffs in controller design change greatly, and designers must consider workload-adaptive solutions. New data placement options and new garbage collection and wear-level algorithms are also essential for enabling QLC in enterprise storage.